This is a read-only archive of an earlier blog posting. Reasons for the
change are at http://blog.sensicomm.com.
The permanent version of this post - with comments (if any) - is at
http://sensicomm.blogspot.com/2011/11/desampling-using-cascaded-integrator.html
Desampling using a Cascaded Integrator Comb
filter
Been working with a BeagleBoard for the
last few months. Can't say much about the project but the Beagle is
a nice ARM Linux platform. Finishing up, so now I have more time to
update the MHZ100Q
sourceforge project page.
I've now added a
page describing the ideas behind the Cascaded Integrator-Comb (CIC)
filter, and why it makes such a nice desampling filter for a
high-rate data acquisition system. Input is 100MHz at 8 bits, and
the output is any integer submultiple down to about 1kHz. The
hardware resources in the FPGA are low: a set of 64-bit adders and
registers, along with a reasonable amount of control logic.
The first version of the page is general description and
overview. I plan to put more details of the math behind the CIC. In
researching math and html, I found asciimathml.js
. It's an open source JavaScript package that lets one embed
equations into a webpage's text using simple LaTeX-like strings.
I've used it internally and it's really nice to use. Should be live
on the mhz100q page in the near future.Comments on blogspot.com
To make or view comments, see the original post at
http://sensicomm.blogspot.com/2011/11/desampling-using-cascaded-integrator.html
